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Monolithic 3D Nanoelectrode Arrays on CMOS Circuitry for Scalable, High-Resolution Neural Recording

March 1, 2026
ActivityScan Assay
MaxLab Live
MaxOne
MaxOne Chip
Method Development
Network Assay
Neuronal Cell Cultures
Aziliz Lecomte, Laurent Mazenq, Marie-Charline Blatché, Aurélie Lecestre, Guilhem Larrieu
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Abstract

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Understanding brain function and neurodegenerative disorders, and accelerating preclinical drug development, demand neural interfaces that combine nanoscale sensitivity with high-resolution, large-scale recording capability. Here, we present a monolithically integrated high-density nanoelectrode array (HD-NEA) featuring vertical high-aspect ratio nanowire electrodes embedded within the back-end-of-line of commercial CMOS circuitry. Using a low-temperature (<400 °C), wafer-scale post-fabrication strategy, we decouple nanostructure formation from circuit integration while preserving CMOS functionality. The resulting 3D array, comprising 26,400 electrodes, achieves high yield and uniformity across 4-in. wafers. When interfaced with in vitro cortical neurons, the HD-NEA yields significantly higher spike amplitudes and signal-to-noise ratios than planar microelectrodes, without requiring electroporation. High-resolution spike mapping revealed steeper spatial signal decay, consistent with closer neuron-nanowires coupling, and enabled the detection of distinct waveform morphologies including putative dendritic signals. These results position HD-NEA as a scalable and CMOS-compatible nanobiointerface, enabling high-fidelity neural recording for neuroscience research, brain–machine interfacing, and bioelectronic diagnostics.